CX74063-36芯片解密研究

来源：IC解密-耐斯迪   时间：2012-4-25   阅读：210次
耐斯迪解密事业部专业承接CX74063-36芯片解密项目合作，针对各类型IC芯片以及疑难解密芯片，我们长期进行专门技术攻关，目前在多个研究领域均拥有系列研究成果，能够提供多达近五十余厂家的数万种型号的IC解密服务。
FEATURES
·Direct down-conversion receiver eliminates the external image reject/IF filters
·Three separate LNAs with single-ended inputs
·RF gain range: GSM = 20 dB, DCS = 22 dB,PCS = 20 dB. Baseband gain range = 100 dB
·Gain selectable in 2 dB steps
·Integrated receive baseband filters with tunable bandwidth
·Integrated DC offset correction sequencer
·Reduced filtering requirements with translational loop transmit architecture
·Integrated transmit VCOs
·Wide RF range for quad band operation
·Integrated PAC loop
·Single integrated, fully programmable fractional-N synthesizer suitable for multi-slot GPRS operation
·Fully integrated wideband Ultra High Frequency (UHF) VCO
·Integrated crystal oscillator
·Separate enable lines for power management transmit,receive, and synthesizer modes
·Supply voltage down to 2.6 V
·Band select and front-end enable states may be exercised on output pins to control external circuitry.
·Low external component count
·Optional bypass of baseband filtering for use with high dynamic range Analog to Digital Converters (ADCs) for current savings
·Interfaces to low dynamic range ADC
·Meets AM suppression requirements without baseband interaction.
·56-pin RFLGA 8x8 mm package (low temperature option,CX74063-34; high temperature option, CX74063-35 and CX74063-36)
·Low power standby mode